1. Field of the Invention
The present invention relates to impedance matching; more particularly, the present invention relates to impedance matching networks and network assemblies, and impedance matching techniques.
2. Description of Related Art
In many materials processing applications and in the manufacturing and processing of semiconductors, Integrated Circuits (IC), displays and other electrical devices, a plasma reacts, or facilitates a reaction, with a substrate, such as a semiconductor wafer. For example, in order to fabricate ICs, modem semiconductor processing systems may utilize plasma assisted techniques such as Reactive Ion Etching (RIE), Plasma Enhanced Chemical Vapor Deposition (PECVD), sputtering, reactive sputtering, and ion-assisted Plasma Vapor Deposition (PVD). Thus, in such known systems, a processing plasma is often employed to assist both etch and deposition processes. The processing plasma can, for example, be formed by coupling Radio Frequency (RF) power to the processing plasma, either capacitively through electrodes or inductively through a coil. In both cases, impedance matching networks are used to improve the transfer of RF power to the processing plasma.